Phani Kishore Gadepalli

PhD Candidate, Computer Science

George Washington University


I am a Doctoral Candidate and Research Assistant in Systems and Security Lab (SSL), advised by Prof. Gabriel Parmer at The George Washington University. My research focuses on building systems and I am the primary researcher on the design and implementation of the scheduling, temporal isolation, and multi-core management mechanisms in the Composite microkernel , and of the aWsm, WebAssembly-based serverless runtime.

I have interned at Arm Inc, San Jose, exploring opportunities for efficient serverless computing for edge systems and built a WebAssembly-based serverless runtime. I have 8 years of Industry experience working at Toshiba Software India Pvt Ltd, India, and Toshiba TEC, Japan. I have worked extensively on the multi-functional peripherals and barcode printers and have developed experience in Linux kernel development, device drivers, board support packages, embedded system development, middleware development, and barcode technologies.


  • Scheduling
  • Mixed-criticality systems
  • Virtualization
  • Parallelism
  • Distributed Systems
  • Edge Computing
  • Serverless Computing
  • WebAssembly


  • PhD in Computer Science, 2020

    George Washington University (to defend in Aug 2020)

  • BE in Computer Science and Engineering, 2007

    Rashtreeya Vidyalaya College of Engineering



Research Intern

Arm Inc

May 2019 – Aug 2019 San Jose, CA
Conducted an extensive survey of existing virtual machine and container-based serverless technologies. Designed and developed a WebAssembly-based serverless runtime from scratch during the internship and published a paper at SRDS’19 with the survey and initial results for our serverless runtime.

Onsite Engineer

Toshiba TEC Corporation

Aug 2008 – Mar 2014 Mishima, Japan
(Terms: Mar 2012 – Mar 2014, Oct 2009 – May 2010, Aug 2008 – Feb 2009) Participated in design discussions with experts, and debugging issues in QA and field issues. Designed and developed embedded barcode printer software including interpreters for printer programming languages.

System Analyst

Toshiba Software India Pvt. Ltd.

Aug 2007 – Jul 2015 Bangalore, India

Designed and developed the system layer providing communication, synchronization and storage functionality on multi-functional peripherals (copy machines). Developed a through understanding of various layers, debugged and proposed crucial design changes to improve performance and maintain stability in a massive code base. Developed and maintained features in Linux kernel and board support packages for different multi-functional peripheral models. Consistently exceeded performance requirements in all half-yearly appraisals. Interviewed and trained many new joinees, both college graduates and experienced candidates. Assumed roles and responsibilities of the Project Manager and Team Leader in their absence.

Projects undertaken:

  • Linux kernel and BSP maintenance for different MFP models.
  • Z-MODE (Zebra Printer Language Interpretation) emulation and SAP PVP (Printer Vendor Program) certification for desktop and portable barcode printers.
  • Bluetooth 2.1+EDR and WLAN 802.11b/g/n modules support for portable barcode printers.
  • MIB and SNMP support for barcode printers.
  • Software and firmware upgrade Windows tool for barcode printers.
  • Software and firmware upgrade features in MFP software for upgrade via uboot and via network from service modes.
  • Common infrastructure layer providing communication, synchronization, storage, service management and MIME functionality development and maintenance for MFPs.



an Efficient Serverless WebAssembly Runtime for the Edge.


a System for Criticality-Aware, Multi-core Coordination.


OS Support for Near Zero-Cost, Configurable Scheduling.


Temporal Capabilities – Access Control for Time.


Slite: OS Support for Near Zero-Cost, Configurable Scheduling

Despite over 35 years of wildly changing requirements and applications, real-time systems have treated the kernel implementation of …

Challenges and Opportunities for Efficient Serverless Computing at the Edge

Serverless computing frameworks allow users to execute a small application (dedicated to a specific task) without handling operational …

Chaos: a System for Criticality-Aware, Multi-core Coordination

The incentive to minimize size, weight and power (SWaP) in embedded systems has driven the consolidation both of disparate processors …

Component-based OS Design for Dependable Cyber-Physical Systems

Cyber-Physical Systems (CPSes) require the difficult combination of both high levels of code assurance and significant software …

Temporal Capabilities: Access Control for Time

Embedded systems are increasingly required to handle code of various qualities that must often be isolated, yet predictably share …